1. Field of the Invention
The present invention relates to a digital/analog conversion apparatus for converting a digital signal into an analog signal. More particularly, it relates to an oversampling-type digital/analog conversion apparatus for carrying out digital/analog conversion at a sampling frequency higher than the sampling frequency of a digital input signal.
2. Description of the Related Art
A digital/analog conversion apparatus comprising a noise shaper and a row of 1-bit digital/analog converters is known as a digital/analog conversion apparatus. This conventionally known type of digital/analog conversion apparatus will be described below referring to FIG. 6. This technology is disclosed in Japanese Laid-open Patent Application No. Hei 5-335963.
FIG. 6 is a block diagram showing an example of a conventional digital/analog conversion apparatus. Referring to FIG. 6, a digital filter 10 is used to increase the sampling frequency fs of an input digital signal, for example, a digital audio signal reproduced from a compact disc, by k times (k: an integer). For the purpose of the explanations given hereinafter, it is assumed that fs=44.1 kHz, and that k=64.
A noise shaper 11 is used to carry out quantization (word length limitation) for a digital signal output from the digital filter 10 and to change the frequency characteristic of noise to a predetermined characteristic. More specifically, the frequency characteristic of noise is changed so that the noise level in the low-frequency region is lowered and so that the noise level in the high-frequency region is raised, for example. It is herein assumed that the noise shaper 11 has a tertiary characteristic, and that output Y relative to input X is represented by (Equation 1).
The quantization (word length limitation) of the digital signal will be described below. The word length limitation is to change such a 16-bit signal as used for a CD player to a signal having about four bits. In other words, briefly speaking, only the higher-order 4 bits of the 16-bit signal are output, and the lower-order 12 bits are fed back and added to the next signal input, whereby the information for the 12 bits to be truncated is made alive. This process is referred to as "noise shaping". EQU Y=X+(1-z.sup.-1).sup.3.multidot.Vq (Equation 1)
where
Vq: a quantization error PA1 z.sup.-1 =cos .theta.-j.multidot.sin .theta. PA1 j: an imaginary unit PA1 Xn-1: the input at the immediately preceding sample PA1 Yn-1: the output at the immediately preceding sample
Furthermore, it is herein assumed that the output Y has seven (=p) output levels (-3 to +3). In addition, to simplify explanations, 3 is added to the output levels, and the output levels in the range of 0 to 6 are used in the following explanations.
A pointer 60 is used to output the remainder of the accumulated value of its input signal. It is herein assumed that the output of the noise shaper 11 is accumulated, and the remainder of the accumulated value, with 6 used as the modulus, is output. When the input of the pointer 60 at time n is assumed to be Xn, the output Yn is represented by (Equation 2). EQU Yn=(Xn-1+Yn-1) mod 6 (Equation 1)
where
A read-only memory (ROM) 61 uses an input signal as an address and outputs 6 (=m=p -1) bit data D5 to D0 corresponding to the address. TABLE 1 shows the relationship between the address of the read-only memory 61 and the data. In TABLE 1, "0" is represented by "." for ease of reading.
TABLE 1 Data Address D5 D4 D3 D2 D1 D0 0 . . . . . . 1 . . . . . 1 2 . . . . 1 1 3 . . . 1 1 1 4 . . 1 1 1 1 5 . 1 1 1 1 1 6 1 1 1 1 1 1
As shown in TABLE 1, the read-only memory 61 replaces an input signal with 1-bit signals, the number of which corresponds to the value of the input signal. More specifically, in the case when the of the input signal is 2 for example, two 1-bit signals among six 1-bit signals take on value "1", and the other 1-bit signals take on value "0". When the value of the input signal takes on a value other than the above-mentioned value, 1-bit signals, the number of which is the value shown in TABLE 1, take on value "1" and the other 1-bit signals take on value "0".
A shifter 62 is used to cyclically shift the 6-bit output of the read-only memory 61 in accordance with the output of the pointer 60. TABLE 2 shows the relationship between the output data D5 to D0 of the read-only memory 61 and the output data b5 to b0 of the shifter 62 in accordance with the output of the pointer 60.
TABLE 2 Output data Pointer b5 b4 b3 b2 b1 b0 0 D5 D4 D3 D2 D1 D0 1 D4 D3 D2 D1 D0 D5 2 D3 D2 D1 D0 D5 D4 3 D2 D1 D0 D5 D4 D3 4 D1 D0 D5 D4 D3 D2 5 D0 D5 D4 D3 D2 D1
A row of 1-bit digital/analog converters 13 comprises 6 (=m) 1-bit digital/analog converters 13-1 to 13-6, each having a uniform characteristic for example, and converts the outputs of the shifter 62 into analog signals.
An analog adder 14 integrates (adds) 6 analog signals output from the row of 1-bit digital/analog converters 13, and outputs the result as an analog signal.
A digital/analog conversion circuit 15 comprises the row of 1-bit digital/analog converters 13 and the analog adder 14.
In the digital/analog conversion apparatus shown in FIG. 6, a digital input signal is changed to a signal having a sampling frequency of 64 fs and seven (=p) levels by the digital filter 10 and the noise shaper 11, and then changed to a row of 1-bit signals comprising six 1-bit signals by the pointer 60, the read-only memory 61 and the shifter 62, and further converted into an analog signal by the digital/analog conversion circuit 15. This digital/analog conversion apparatus is the so-called oversampling-type digital/analog conversion apparatus for converting a digital signal into an analog signal by using a sampling frequency higher than the frequency of the digital signal.
FIG. 7 shows the results of a computer simulation of the output signal spectrum of the digital/analog conversion apparatus shown in FIG. 6 in the case when the digital/analog conversion circuit 15 has an ideal characteristic. As an input signal, a digital signal equivalent to a sinusoidal wave of 2 kHz and 0 dB is supplied. In addition, a signal in the range of 0 to 2 fs (88.2 kHz) is shown. The above-mentioned ideal characteristic is that all the six 1-bit digital/analog converters 13-1 to 13-6 of the row of 1-bit digital/analog converters 13 have a uniform output.
In this digital/analog conversion apparatus, a digital signal having only seven levels is converted into an analog signal as described above. However, by using the noise shaper 11, it is possible to obtain a dynamic range of more than 100 dB in the signal frequency band of 0 to fs/2 as shown in FIG. 7.
Next, the operations of the pointer 60, the read-only memory 61 and the shifter 62 will be described below.
In FIG. 7, an ideal case is assumed, wherein all the six 1-bit digital/analog converters 13-1 to 13-6 of the row of 1-bit digital/analog converters 13 have a uniform output. However, since it is impossible to produce the 1-bit digital/analog converters 13-1 to 13-6 completely uniformly in an actual circuit, some variations (relative errors) are present inevitably among the outputs of the 1-bit digital/analog converters 13-1 to 13-6. The variations will cause noise and harmonic distortion. To prevent the noise and harmonic distortion, the 1-bit digital/analog converters 13-1 to 13-6 are cyclically used in the digital/analog conversion apparatus.
The reasons why the noise and harmonic distortion are caused by the variations in the characteristics of the 1-bit digital/analog converters 13-1 to 13-6, and the reasons why the harmonic distortion is suppressed by cyclically using the 1-bit digital/analog converters 13-1 to 13-6 will be described below.
Seven outputs in the range of 0 to +7 can be obtained by using the six 1-bit digital/analog converters 13-1 to 13-6. However, if the output level of the third 1-bit digital/analog converter 13-3 is not +1 but +1.01 for example, +3.01 is output, although +3 should be output essentially, thereby causing an error. In other words, distortion occurs. If the input signal is not a pure tone, the output becomes noisy.
By cyclically using the six 1-bit digital/analog converters 13-1 to 13-6, the 1-bit digital/analog converters 13-1 to 13-6 can be used almost uniformly in a long period of time. As a result, the distortion due to the error components is dispersed, whereby the harmonic distortion is suppressed as the result of the addition of the signals of the 1-bit digital/analog converters 13-1 to 13-6.
A configuration for cyclically using the 1-bit digital/analog converters 13-1 to 13-6 will be described below. In the digital/analog conversion apparatus, a signal having seven levels (0 to 6) output from the noise shaper 11 is first input to the pointer 60. As a result, the pointer 60 accumulates the signal having seven levels (0 to 6) output from the noise shaper 11, and obtains and outputs the remainder of the accumulated value, with 6 used as the modulus, as described above. Therefore, the output of the pointer 60 has six values in the range of 0 to 5.
On the other hand, by also inputting the output of the noise shaper 11 to the read-only memory 61, 6-bit data is obtained from the read-only memory 6. This 6-bit data represents unweighted six 1-bit signals. Furthermore, by inputting these six 1-bit signals to the shifter 62, and by inputting the output of the pointer 60 to the shifter 62, the six 1-bit signals are circulated. The outputs of the shifter 62 obtained as described above are as shown in TABLE 3, for example. TABLE 3 shows the relationship among time, input signal (ROM address), pointer output and shifter output.
TABLE 3 Input signal Pointer Shifter Time (ROM address) output output 0 1 0 . . . . . 1 1 3 1 . . 111. 2 1 4 . 1. . . . 3 1 5 1. . . . . 4 6 0 111111 5 4 0 . . 1111 6 2 4 11. . . . 7 2 0 . . . . 11 8 6 2 111111 9 5 2 1111. 1 10 0 1 . . . . . . 11 3 1 . . 111. . . . . . . . . . . . .
As shown in TABLE 3, six 1-bit signals are output from the shifter 62 so that values "1", the number of which is indicated by the value of the input signal, are circulated. This means that the value of the input signal is not related to a specific 1-bit signal among the six 1-bit signals. Furthermore, the usage frequency of each bit is uniform in a sufficiently long period or time. For these reasons, even if variations are present among the output of the 1-bit digital/analog converters 13-1 to 13-6 to which the six 1-bit signals are input respectively, it is possible to reduce the occurrence of noise or the like in the signal frequency band.
However, in the above-mentioned conventional digital/analog conversion apparatus, harmonic distortion may occur in the outputs of the 1-bit digital/analog converters 13-1 to 13-6 of the digital/analog conversion circuit 15 shown in FIG. 6. It is supposed that this occurs because of a cause different from the above-mentioned variations in the outputs of the 1-bit digital/analog converters 13-1 to 13-6. The conditions in this case are shown in FIG. 8.
FIG. 8 shows the output spectrum of the 1-bit digital/analog converter 13-1, obtained by computer simulation, at the time when the input signal is a digital signal equivalent to a sinusoidal wave of -40 dB and 2 kHz. Since only one output among the outputs of the six 1-bit digital/analog converters 13-1 to 13-6 is observed, the amplitude becomes 1/6. Therefore, the level of the signal is about -55 dB. It is found that harmonic distortion has occurred, and its level is high, about -70 dB, as shown in FIG. 8.
The reasons why the harmonic distortion occurs in the outputs of the 1-bit digital/analog converters 13-1 to 13-6 will be described below. It is said that a kind of resonance (oscillation) condition occurs because of the relationship between the values of the input signals and the quantity of the 1-bit digital/analog converters 13-1 to 13-6. Since the inputs of the 1-bit digital/analog converters 13-1 to 13-6 (the outputs of the shifter 62) are equivalent to a primary noise shaper, i.e., a primary .DELTA.-.epsilon. modulator, resonance is apt to occur, although no detailed explanation is given. In particular, resonance occurs at a constant frequency.
It is noted that the conventional example solves the problem of analog distortion noise caused by analog output errors among the 1-bit digital/analog converters 13-1 to 13-6. On the other hand, the present invention uses a digital circuit configuration comprising the pointer 60, ROM 61 and shifter 21 to solve the problem of digital harmonic distortion singularly occurring in the case when a digital signal equivalent to a sinusoidal wave having a constant frequency is input, for example. Hence, the cause of the harmonic distortion differs from that of the distortion having been solved by the conventional example.
Since the 1-bit digital/analog converters 13-1 to 13-6 are cyclically used as described above, the output spectrums of the 1-bit digital/analog converters 13-2 to 13-6, other than the 1-bit digital/analog converter 13-1, are similar to that of the 1-bit digital/analog converter 13-1, whereby harmonic distortion occurs. However, the harmonic distortion differs in phase among the 1-bit digital/analog converters 13-1 to 13-6. Therefore, if no variation is present (in an ideal case) among the 1-bit digital/analog converters 13-1 to 13-6, the harmonic distortion occurring in the 1-bit digital/analog converters 13-1 to 13-6 can be canceled by the addition at the analog adder 14, and no harmonic distortion occurs at the output of the analog adder 14.
However, variations are present among the outputs of the actual 1-bit digital/analog converters 13-1 to 13-6 as described above. Therefore, the distortion is not canceled by the analog adder 14, but remains at the output of the analog adder 14.
In other words, the analog distortion caused by the errors in the outputs of the 1-bit digital/analog converters 13-1 to 13-6 occurs because of a fixed cause, and can be suppressed by the conventional technology. However, the harmonic distortion occurring digitally in the 1-bit digital/analog converters 13-1 to 13-6 has a considerably high level, and the cause of the occurrence is not fixed. For these reasons, the harmonic distortion cannot be suppressed by simple circulation operation.